Parallel construction of interprocedural memory SSA form

This paper presents ParSSA, a fully parameterised approach for parallel construction of interprocedural memory SSA form by utilising multi-core computing resources. ParSSA partitions whole-program memory objects into uniquely identified memory regions. The indirect memory accesses in a function are fully parameterised using partitioned memory regions, so that the memory SSA construction of a parameterised function is readily parallelised. We implemented ParSSA in LLVM using Intel Threading Building Block (TBB) for creating parallel tasks. We evaluated ParSSA using 15 large applications. ParSSA achieves up to 6.9 ×  speedup against the sequential version on an 8-core machine.