Multi-resistance states in the electrical switching behavior of amorphous Si15Te75Ge10 thin films: Possibility of multi-bit storage

•Multiple resistance levels are achieved using a single chalcogenide phase change material.•Current ramp rate influences the SET resistance level of thin film devices.•Multi-stage crystallization is seen to be effecting multiple resistance levels.•The material is tested for the SET–RESET capability for possible application in PCM.

Electrical switching studies on amorphous Si15Te75Ge10 thin film devices reveal the existence of two distinct, stable low-resistance, SET states, achieved by varying the electrical input to the device. The multiple resistance levels can be attributed to multi-stage crystallization, as observed from temperature dependant resistance studies. The devices are tested for their ability to be RESET with minimal resistance degradation; further, they exhibit a minimal drift in the SET resistance value even after several months of switching.