Nanoscale T-shaped Double Gate DG MOSFET: Numerical Investigation for Analog/RF and Digital Performance

The present work demonstrates the investigation of T-shaped Double Gate MOSFET for analog and digital performance. The 2D analytical modeling scheme is presented using Evanescent Mode Analysis (EMA). The applicability of the proposed model has been verified using ATLAS 3D device simulation. The device exploits peaks in the electric field inside the channel (due to T-shaped gate) for better carrier transport efficiency and subsequently higher drain current and trans-conductance. The impact of dielectric constant of the void layer (due to T-shaped gate) on the electrostatic of the device has been investigated using basic electrical parameters such as: sub-threshold slope, Drain Induced Barrier Lowering DIBL, device gain and Ion/Ioff ratio. The comparative study between T-shaped DG with the conventional DG MOSFET is also presented.