Applications of impact-ionization metal–oxide-semiconductor (I-MOS) devices to circuit design

In this paper, the applicability of impact-ionization metal–oxide-semiconductor (I-MOS) devices has been discussed to some circuits such as static inverters, static NAND gates, static NOR gates, and 6T-SRAM cells. Based on detailed circuit analysis, some critical issues are overcome: cascadability, power consumption, series connection, and unidirectional output current. Complementary I-MOS (CI-MOS) inverters show higher noise margin and lower crowbar current than CMOS ones, which leads to the reduction of supply voltage and short-circuit power dissipation, respectively. In the case of static NAND and NOR gates, the CI-MOS also shows improved noise margin. Finally, CI-MOS 6T-SRAM cells show 22.6% improvement in SNM without much penalty in cell area compared with CMOS ones.