Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
1832498 | Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment | 2006 | 7 Pages |
Abstract
The goal of this work is to provide an extensive analysis of the noise performances which can be attained by detector front-end integrated circuits in the 0.13 μm CMOS node. To estimate the noise limits of a front-end system in this CMOS generation, the paper presents the results of measurements carried out on NMOS and PMOS devices fabricated in a commercial process. Parameters extracted from experimental data are used to define design criteria for noise optimization in the perspective of future experimental environments (SLHC, ILC, Super B-Factory).
Related Topics
Physical Sciences and Engineering
Physics and Astronomy
Instrumentation
Authors
Valerio Re, Massimo Manghisoni, Lodovico Ratti, Valeria Speziali, Gianluca Traversi,