Neuro-fuzzy system with high-speed low-power analog blocks

This paper proposes several improved CMOS analog circuits for neuro-fuzzy system, including Gaussian-like membership function circuit, minimization circuit, and a centroid algorithm defuzzification circuit not using division. A two-input/one-output neuro-fuzzy system composed of these circuits is implemented and testified for non-linear function approximating. All the circuits have been fabricated in SMIC 0.18-μm Mixed-signal CMOS technology. Experiment results show that all the proposed circuits provide characteristics of high operation capacity, high speed, and simple structures. They are very suitable for rapid implementation of high-speed complex neuro-fuzzy system.