Article ID Journal Published Year Pages File Type
438273 Theoretical Computer Science 2007 27 Pages PDF
Abstract

This paper presents the initial step of an aid design method earmarked for operational validation of hard real-time systems. We consider systems that are composed of sequential hard real-time tasks, which are embedded on centralized multiprocessor architectures. We introduce a model based upon untimed finite automata and meant to collect the operational behaviors of the system compatible with its time specifications, and we go on to provide a feasibility decision result for systems composed of tasks presenting CPU loads which are exact values: execution times are not WCET values. This is why we call this approach WCET-free analysis. The results we have achieved likewise involve hardware specifications such as multiprocessors and speeds of processors.

Related Topics
Physical Sciences and Engineering Computer Science Computational Theory and Mathematics