Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
445247 | AEU - International Journal of Electronics and Communications | 2009 | 5 Pages |
Abstract
In this paper, a 1 V, 2 GHz CMOS low-noise amplifier (LNA) was developed intended for use in the front-end receiver. The circuit is simulated in standard 0.25μm CMOS MOSIS. The LNA gain is 25.675 dB, noise figure (NF) is 4 dB, reverse isolation (S12)(S12) is -134.3dB, input return loss (S11)(S11) is -14.6dB, output return loss (S22)(S22) is -13.34dB, and the power consumption is 5.13 mA from a single 1 V power supply. One of the features of the proposed design is using a three-component cascode limitation, one of it is a transistor, to reduce the supply voltage.
Keywords
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Physical Sciences and Engineering
Computer Science
Computer Networks and Communications
Authors
Mohammed K. Salama, Ahmed M. Soliman,