Article ID Journal Published Year Pages File Type
445338 AEU - International Journal of Electronics and Communications 2008 5 Pages PDF
Abstract

The distribution of clock signals throughout the nodes of a network is essential for several applications in control and communication with the phase-locked loop (PLL) being the component for electronic synchronization process. In systems with master–slave (MS) strategies, the PLLs are the slave nodes responsible for providing reliable clocks in all nodes of the network. As PLLs have nonlinear phase detection, double-frequency terms appear and filtering becomes necessary. Imperfections in filtering process cause oscillations around the synchronous state worsening the performance of the clock distribution process. The behavior of one-way master–slave (OWMS) clock distribution networks is studied and performances of first- and second-order filter processes are compared, concerning lock-in ranges and responses to perturbations of the synchronous state.

Related Topics
Physical Sciences and Engineering Computer Science Computer Networks and Communications
Authors
, ,