A high-PSRR low-power CMOS voltage reference based on weighted VGS difference

A high PSRR CMOS voltage reference circuit suitable for applications with noisy environments like power telemetry solutions and system on a chip (SOC) integrations is presented. The reference voltage is generated based on the difference between weighted gate-to-source voltages (VGS) of MOS transistors operating in subthreshold region. The circuit PSRR is improved using a new circuit configuration which removes the need for a passive resistive branch to scale up VGS voltages. The PSRR is further enhanced by reordering the pole-zero locations of the PSRR transfer function and then using supply-independent biasing circuit. Implemented in a 0.18 μm standard CMOS process, the circuit occupies an area of about 0.035 mm2. The minimum supply voltage is 1.4 V and the maximum temperature coefficient is about 82 ppm/°C. The PSRR at 100 Hz and 10 MHz frequencies are approximately −70 dB and −100 dB respectively. Using a 1.8 V supply voltage, it consumes at least 42 nA and at most 125 nA depending on operating temperature and process corners.