| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 446610 | AEU - International Journal of Electronics and Communications | 2010 | 4 Pages |
Abstract
Analog-to-digital converter (ADC) based on successive approximation (SAR) include a capacitive digital-to-analog converter (CDAC). The matching of these capacitors directly influences the DC characteristics of the ADC. These are the differential-non-linearity (DNL), the gain, the offset and the common mode rejection. The capacitive matching is typically only accurate up to 10 bits. Trim solutions are required to achieve a higher resolution. In this work trim techniques are derived by the help of analytical investigations. These algorithms are implemented in a 12 bit, 2MSPS converter. The functionality of the trim techniques is verified by measured results.
Related Topics
Physical Sciences and Engineering
Computer Science
Computer Networks and Communications
Authors
Frank Ohnhaeuser, Martin Allinger, Mario Huemer,