Bit interleaved coded modulation to enable fractional bits-per-cell storage at NAND flash memory

In this paper, a practically implementable bit interleaved coded modulation (BICM) scheme is introduced to enable fractional bits-per-cell storage at NAND flash cells. The proposed system utilizes a near-systematic modulation scheme as well as a demodulation algorithm that generates reliability information for the use of soft-input error correction code (ECC) decoders. Both modulation and demodulation algorithms have simple structures and they are implemented in hardware efficiently with small area/power cost. Via software simulations and actual flash data experiments, we showed the benefits of the proposed BICM scheme using a low density parity check (LDPC) code.