Optimal digital reconstruction and calibration for multichannel Time Interleaved ΣΔ ADC based on Comb-filters

High resolution, large dynamic range wideband Analog to Digital Converter (ADC) remains a bottleneck to realize software and cognitive radio receivers. Time Interleaved Sigma-Delta (TIΣΔ) architecture is a potential candidate to increase the bandwidth of the ΣΔ like ADCs. However, very high digital filter complexity is required and it is very sensitive to channel mismatch which is unavoidable especially in advanced manufacturing process. This paper proposes a new digital signal processing based on Comb-filter cells and correction FIR filter. Comparing to existing solutions, the proposed solution reduces Drastically the digital filter complexity and thus the power consumption and the die area of the digital post-filtering at the backend of the TIΣΔ ADC. This solution was validated and synthesized in a 1.2 V, 65 nm CMOS process using VHDL language. The total die area is estimated to 0.115 mm2. Moreover, this paper proposes a fully digital gain equalization and offset cancellation methods without any additional material resources. These methods achieve a high accuracy with a very short calibration time estimated to about 10 clock cycles.