0.65 V class-AB current-mode four-quadrant multiplier with reduced power dissipation

A class-AB CMOS current-mode four-quadrant multiplier with an improved biasing scheme is introduced in this letter. Compared to the corresponding already published topology, the proposed multiplier offers a significant reduction of power dissipation without increasing the circuit complexity. The behavior of the proposed topology has been verified through simulation results using typical parameters of a 0.13 μm CMOS technology.