Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
449802 | AEU - International Journal of Electronics and Communications | 2006 | 6 Pages |
Abstract
This paper describes the novel chip design and modeling of 2.4 GHz CMOS transistor Class-E power amplifier (PA) to meet IEEE 802.11b/g receiver specifications for WLAN applications. Techniques for accurate modeling of active and passive components at 2.4 GHz WLAN band are presented. The input power for this PA is −5 dBm. The overall layout is completed by TSMC 0.25μm radio frequency (RF) process. The post-layout simulation indicates that the power-added efficiency (PAE) is about 50.6% and this PA can generate 24.1 dBm of output power from a 1.5 V supply into a 50Ω load.
Related Topics
Physical Sciences and Engineering
Computer Science
Computer Networks and Communications
Authors
Jhin-Fang Huang, Ron-Yi Liu, Pei-Sen Hong,