Delta-sigma (ΔΣ) frequency synthesizers for wireless applications

This paper describes the state-of-the-art design approaches to delta-sigma (ΔΣ) frequency synthesizers for wireless transceiver applications. Various synthesizer architectures, including the integer and fractional-N synthesizers, and frequency-to-digital converters (FDC) based digital frequency synthesizers are described. Design specifications for several loop parameters such as noise shaper order in the feedback modulator, loop filter bandwidth, VCO phase noise are based on modulation accuracy and frequency resolution specifications. Advantages of digital loop filter based ΔΣ frequency synthesizers are analyzed.