Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
454254 | Computer Standards & Interfaces | 2009 | 8 Pages |
Abstract
This paper presents research results from the field of automated generation of verification model from real-life SDL (Specification and Description Language) specification of the system. An award winning model checker Simple Promela Interpreter (Spin) was used for formal verification. Preparing a verification model from real-life specification is a hard task. We implement most of our research results in the tool named sdl2pml (SDL to Promela) in order to avoid human errors while building the verification model. This tool is used for automated generation of the model. We present its architecture and compare the implemented features with other existing tools. Additionally, we demonstrate its use on a real-life specification of an IUA (ISDN User Adaptation) protocol which is part of the SI3000 softswitch.
Related Topics
Physical Sciences and Engineering
Computer Science
Computer Networks and Communications
Authors
Aleksander Vreže, BoÅ¡tjan VlaoviÄ, Zmago BrezoÄnik,