On the design of modulo 2n + 1 dot product and generalized multiply–add units

In this work, modulo 2n + 1 fused architectures of dot product and generalized multiply–add units for operands in the weighted representation are proposed. According to our algorithm, the partial products and the additive operands are efficiently added using inverted end around carry-save adder trees. This approach results to large savings on delay, area and power compared to using discrete units. Optimization techniques and implementation results for units with practical interest are also given. The proposed modulo 2n + 1 arithmetic units can be utilized in all applications where the residue number system is used for the implementation of digital signal processing and cryptography algorithms.