Hierarchical matched filter based on FPGA for mobile systems

The paper is concerned with the design of field programmable gate array (FPGA) based hierarchical matched filter (HMF) for new generation cellular mobile radio systems. This is considered as the most important task of the receiver and should be implemented with minimum hardware. The synchronization codes considered in the work is the one used in wideband code division multiple access (W-CDMA) system as described by the third Generation Partnership Project (3GPP) specifications. The proposed system relies on the use of the hierarchical matched filter using transposed structure of finite impulse response (FIR) filter. The HMF implementation is verified to perform the required partial correlation. A simplified design for the realization of the filter tap is presented. This has the advantage of being configurable and flexible to reduce the overall hardware complexity of the system.