Full custom low-power/high performance DDP-based Cobra-H64 cipher

This paper presents, for the first time, a full custom layout design for a Data Dependent Permutation (DDP)-Cobra H64-bit cipher, using pipelining techniques in the internal rounds blocks to increase the throughput of the design. As a result, the silicon area and the power dissipation are reduced too. The design achieves a small area by simplifying the complex design by simpler designs. Low power consumption is satisfied by using low power logic gates. The throughput ranges from 5.5 to 8.4 Gbps. Simulation results based on the layout level have confirmed the validity of the proposed technique, as well as have confirmed that low power, speed and performance can be optimized through design at the layout level.