Computational architectures for sonar array processing in autonomous rovers

This paper presents design of novel embedded computational architectures for real time, in-motion mapping based on ultrasound sensors for use in resource constrained autonomous rovers. Autonomous rovers are a class of real time systems that are constrained for size, weight, on-board computational resources and power. Embedded computing architectures designed for implementing the mapping and navigational algorithms must optimize the use of these resources. In the process of map generation, raw sensor data obtained from an array of ultrasound sensors is filtered for sensor noise using probabilistic sensor model, and probabilistic data fusion methods are employed for spatial and temporal correlation of data for improving the map. In this paper, we present a System-on-Chip design based design space exploration of embedded computational architectures for implementation on field programmable gate arrays. We seek to exploit system level, region level and sensor level parallelism in the mapping algorithm for enhancing the throughput. Design space exploration is carried out by employing existing soft core processors, designing custom co-processors and data path modules and integrating them using parallel and pipelined data flow approaches. Results of mapping a test area on all the architectures are compared to characterize the performance and suitability of the proposed architectures.