Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
462713 | Microprocessors and Microsystems | 2013 | 7 Pages |
A new method using polynomial residue number systems (PRNS) is introduced in this paper to protect the Advanced Encryption Standard (AES) against faults attacks. By using PRNS, the byte based AES operations over GF(28) are decomposed into several parallel operations that use its residues over smaller fields. Three GF(24) irreducible polynomials are selected as the moduli set for the chosen PRNS, including a redundant modulus to achieve error detection. Three GF(24) AES cores are constructed individually according to the chosen moduli. This PRNS architecture brings several advanced features to AES design from the scope of anti-side-channel analysis. Firstly, for each 8-bit GF(28) element, this implementation is capable of detecting up to 4 bits errors that occur in a single GF(24) AES core. Secondly, thanks to the data independency between PRNS operations, the distributed PRNS AES cores have an intrinsic resistance against probing attacks. In addition, due to the introduction of redundant information and the residue representation replacing the original representation, more confusion is added to the system, which may also enhance the design’s security. To the authors’ knowledge, this is the world’s first PRNS AES implementation. Two different architectures for implementing the proposed error detecting AES are demonstrated and supported by actual hardware implementation results on FPGA.