Article ID Journal Published Year Pages File Type
462793 Microprocessors and Microsystems 2012 20 Pages PDF
Abstract

Reconfigurable computing is a promising technique for real time computing-intensive embedded applications. In this paper, we propose a novel hardware task model and an optimal 2D surface partitioning strategy for managing a partially run time reconfigurable hardware resource. A mesh network-on-chip is designed to be used as the communication environment for the hardware tasks. An offline design flow is proposed for generating the bit-stream and finally, an online real time operating system scheduler that supports true hardware multitasking is presented. The proposed components form the necessary building blocks of a complete reconfigurable computing platform suitable for real time computing-intensive embedded applications.

Related Topics
Physical Sciences and Engineering Computer Science Computer Networks and Communications
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