Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
463013 | Microprocessors and Microsystems | 2009 | 7 Pages |
Reconfigurable architectures are increasingly often applied in various industrial data processing applications, due to the possibility for performing parallel computations and achieving a simplified Systemon-Chip design flow. Furthermore, the exploitation of dynamic and partial hardware reconfiguration has been investigated in different research projects, often in systems based on Xilinx Virtex 2/4 FPGA families, by time-multiplexing hardware resources for multiple functions. This paper describes the exploitation of partial reconfiguration for dynamic power management in a low-power Spartan 3-based level measurement application. The reconfiguration process is thereby applied to optimize system implementation according to the applications requirements on power consumption and performance.