Article ID Journal Published Year Pages File Type
463129 Microprocessors and Microsystems 2012 13 Pages PDF
Abstract

In recent years, code compression has been frequently investigated for embedded systems to reduce memory use and power consumption. Among various compression schemes, dictionary-based ones are applied for their good compression ratios and rapid decompression engines. Bitmask-based code compression, which was derived from the dictionary-based ones, has been proven to have a superior compression ratio and rapid decompression engine. In this paper, we adopt the bitmask-based scheme and replace some of its dictionary entries to achieve greatly reduced power consumption while maintaining a competitive compression ratio. For a cacheless architecture, we propose three basic styles of replacement, namely by-access-saving, by-frequency, and by-block. Another procedure, called by-alignment, is applied afterward to further improve power consumption. According to the experimental results, the by-block scheme with the by-alignment procedure achieves the best result. In the best case, an increase of 1.61% in compression ratio can result in a 43.75% reduction in power consumption ratio.

Related Topics
Physical Sciences and Engineering Computer Science Computer Networks and Communications
Authors
, , ,