Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
471225 | Computers & Mathematics with Applications | 2008 | 9 Pages |
The Residue Number System (RNS) is a representation system which provides fast and parallel arithmetic. It has a wide application in digital signal processing and provides enhanced fault tolerance capabilities. In this work, we consider the 3-moduli set {2n2n, 22n−122n−1, 22n+122n+1} and propose its residue to binary converter using the Chinese Remainder Theorem. We present its simple hardware implementation that is mainly composed of one Carry Save Adder (CSA), a 4n4n bit modulo 24n−124n−1 adder, and a few gates. We compare the performance and area utilization of our reverse converter to the reverse converters of the moduli sets { 2n−12n−1, 2n2n, 2n+12n+1, 22n+122n+1} and {2n−12n−1, 2n2n, 2n+12n+1, 2n−2(n+1)/2+12n−2(n+1)/2+1, 2n+2(n+1)/2+12n+2(n+1)/2+1} that have the same dynamic range and we demonstrate that our reverse converter is better in terms of performance and area utilization.