Updation of Activation Sequence of a Chip after its Deployment for Access Control

For protection of Intellectual Property (IP) in VLSI industry, a design level obfuscation is applied for simultaneous authentication and locking of IPs. When a chip with multiple IPs or System-on-Chip (SoC) is deployed, application of the same input sequence each time for its activation encourages interception/tapping of the sequence and subsequent breach of security. A legal user may sell the hardware and share its secret information for activation. Therefore, periodic update of activation sequence of a chip/SoC is a practical requirement. However, update of activation sequence is not supported in an IC. We propose a low overhead, low complexity design modification to facilitate periodic as well as on-demand update of activation sequence of a chip/SoC after its deployment. For the proposed technique, the probability of predicting an updated sequence from its correlation with the previous ones is negligible for an attacker. The simulation results on ISCAS’89 benchmark circuits are encouraging. The overheads of design modification on area, delay and power are very low.