Article ID Journal Published Year Pages File Type
491810 Simulation Modelling Practice and Theory 2011 11 Pages PDF
Abstract

The problem of computing the capacitance coupling in Very Large Scale Integrated (VLSI) circuits is studied in this work. The proposed method is an approximate extended version of the method of images. The initial problem is formulated here as an optimization problem for the solution of which a genetic algorithm (GA) is employed. The proposed method is fast, general, does not rely on fitting techniques and is applicable to an arbitrary 2D or 3D geometry configuration of conductors. Extensive simulation results are presented for several practical case studies. Comparative results are given with other methods from literature and a commercial tool employing the Finite Element Method (FEM). The results show that the capacitance value computed by our method is in close agreement to the value obtained by the other methods from literature and also by the commercial tool with the average difference ranging between 2% and 5% while demonstrating better scalability as the problem complexity rises.

Related Topics
Physical Sciences and Engineering Computer Science Computer Science (General)
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