Article ID Journal Published Year Pages File Type
492748 Procedia Technology 2014 8 Pages PDF
Abstract

This paper presents the design and simulation of a 5 GHz band monolithic linearized Digitally Controlled Voltage Gain Amplifier. Intended to be integrated with a receiver monolithic front-end die, the fully integrated circuit was implemented in a cheap 0.18 μm CMOS technology. The digital circuit comprises an internal six bit DAC and a four bit input logic control converter, allowing a response gain of sixteen linearized levels. The simulations, optimized to noise performance, linearity, dynamic gain and minimum differential phase and magnitude error, were performed with BSIM3 model. Circuit simulations present 12.5 dB dynamic differential gain variation, a phase and a transducer gain magnitude errors less than 0.5° and 0.9%, respectively, in a 400 MHz span around 5.2 GHz, NF <6 dB (3 dB at maximum gain), 50 Ω input and output match, while drawing 2.3 mA from a 1.8 V power supply.

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Physical Sciences and Engineering Computer Science Computer Science (General)