Towards large scale optimistic VLSI simulation

In this paper, an optimistic parallel and distributed logic simulator, XTW, is proposed. In XTW, a new event scheduling mechanism, XEQ, and a new rollback procedure, rb-messages, are proposed for use in optimistic logic simulation. XTW groups LPs into clusters, and makes use of a multi-level queue, XEQ, to schedule events in the cluster. XEQ has an O(1) event scheduling time complexity. Our new rollback mechanism replaces the use of anti-messages by an rb-message, and eliminates the need for an output queue at each LP. Experimental comparisons to Clustered Time Warp reveal a superior performance on the part of XTW, while experimental results on large circuits (5-million-gate to 25-million-gate) demonstrate that XTW scales well with both the size of a circuit and the number of processors used in the simulation.