Implementation of the RBF neural chip with the back-propagation algorithm for on-line learning

- This paper presents the hardware implementation of the floating-point processor (FPP).
- Radial basis function (RBF) neural network is developed on FPGA.
- FPP is designed to implement the back-propagation algorithm in detail.
- The on-line learning process of the RBF chip is compared numerically with the results of the MATLAB program.
- The performance of the designed RBF neural chip is tested for the real-time pattern classification of the XOR logic.
- Performances are evaluated by comparing results from the MATLAB through extensive experimental studies.