Performance and efficiency analysis of THP algorithms: A practical perspective

As an attractive interference cancellation (IC) technique, Tomlinson-Harashima precoding (THP) has been investigated thoroughly in theory. Several high performance THP variants have been proposed, e.g., sorted QR decomposition (SQRD), Cholesky decomposition, vertical Bell Laboratories space time (V-BLAST) and lattice reduction aided THPs. From a practical perspective, however, limited hardware implementations have been reported in the literature so far. To bridge the progress gap between the theory and the practice, we present a comprehensive analysis of these THP variants in terms of performance and implementation efficiency in this paper. We first evaluate their bit-error rate (BER) performance under perfect and imperfect channel state information (CSI) scenarios. Subsequently, the emphasis is put on their implementation efficiency, including the computational complexity, the numerical precision requirement and the parallelism potential. Our analysis shows a wide trade-off space exists between the performance and the implementation efficiency in different THP variants, which is especially valuable for hardware designers to implement cost-efficient architectures biased towards practical systems.