Performance analysis of pre-equalized multilevel partial response modulation for high-speed electrical interconnects

In this paper, we first review the baseband modulation techniques intended for use in short-reach, high-speed electrical interconnects. Then we briefly introduce the high-level design concepts of the investigated electrical interconnect, indicating the main limitations and outlining the transceiver complexity related to the advanced modulation designs. We further investigate finite-complexity linear pre-equalization under an average transmit power constraint of both full-response and precoded partial response signaling with pulse amplitude modulation (L-PAM) mapping. For a representative electrical interconnect, we argue that the constellation size, the type of modulation, the detection method as well as the number of pre-equalizer taps should be carefully selected in order to achieve target error performance at data rates between 100 Gbit/s and 200 Gbit/s. We show that for many combinations of above mentioned parameters, precoded duobinary 4-PAM yields the best error performance for a fixed average transmit power.