Exploring redundancy granularities to repair real-time FPGA-based systems

Scrubbing has been a traditional way of improving the reliability of SRAM-based FPGAs, which are largely used by the industry but are very sensitive to Single Event Upsets (SEU). This vulnerability mainly resides in the configuration memory, which is very large. The conventional approach to SEU mitigation is to use some form of redundancy with a periodic scrubbing of the configuration memory, thus removing accumulated SEUs. In this paper, we propose a novel approach to scrub FPGAs in real-time systems, by using diagnostic information based on the primary outputs of the circuits, in the form of a coarse-grained DMR, and a specialized scrubbing mechanism to avoid missing real-time deadlines. An alternative diagnostic scheme is also investigated for benchmark circuits that presented subpar repair performance due to large clock cycle overheads.