Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
4956793 | Microprocessors and Microsystems | 2016 | 12 Pages |
Abstract
As the number of processor cores increases and the core size shrinks, chip temperature has become a critical design issue for Network-on-Chip (NoC) based many-core systems. However, few task mapping methods consider temperature optimization, and even fewer in multi-application scenarios. In this paper, we propose a temperature-aware multi-application mapping scheme for NoC-based many-core systems. Chip temperature is reduced by balancing workloads among cores while few communication overheads are introduced. The applications are firstly partitioned into subgraphs, and the inter-subgraph communication is minimized. A submesh region is then allocated to each subgraph so as to avoid long distance communication. The processing speed of each core is estimated to decide the submesh size according to current temperature distribution, so the submesh allocation is efficient for balanced core temperatures. Finally, task mapping within each pair of subgraph and submesh is performed. The core temperatures, the heating of adjacent cores, chip layout and communication overheads are all considered. Besides, the voltage and frequency level of each task is also scaled down for temperature reduction while timing constraints are guaranteed. Experimental results show that the peak temperature is reduced by 4.8°C compared to current approaches and the temperature variance is reduced to 42% of the initial temperature variance. The energy consumption and communication overheads are also reduced.
Related Topics
Physical Sciences and Engineering
Computer Science
Computer Networks and Communications
Authors
Shan Cao, Zoran Salcic, Zhaolin Li, Shaojun Wei, Yingtao Ding,