Matrix Code Based Error Correction for LUT Based Cyclic Redundancy Check

Communication is one of the vast and rapidly growing fields of engineering. Increasing the efficiency of communication by overcoming the external electromagnetic sources and noise is a challenging task. Various error detection and correction methods are introduced to reduce the loss of data while transmission. This paper proposes a novel method which use Cyclic Redundancy Check(CRC) for the error detection and the generated CRC error is corrected by using Hybrid Matrix Code(HMC) and they are coded in verilog HDL and simulated using Xilinx ISE Design suite 14.2. This proposed method can provide maximum error detection and correction capability with reduction in delay.