Improved acquisition in a phase-locked loop using sliding mode control techniques

In many phase-lock loop (PLL) applications, the naturally occurring pull-in process is too slow and unreliable. Therefore, PLLs use acquisition aids to mitigate the process of locking onto the phase of some input reference signal. Commonly used acquisition aids have deficiencies with limiting effects. For voltage-controlled oscillator (VCO) sweeping, deficiencies include lock detector requirements and search rate limitations. For a charge-pump subsystem, the operated sequential phase detector (PD) is less resistant to errors than an analog multiplier PD. In order to overcome the deficiencies of common acquisition aids and improve PLL robustness to perturbations, it is proposed to use a conventional or a second order sliding mode controller (SMC/2-SMC) as an acquisition aid to provide robust finite-time phase-lock in the PLL. This improvement is achieved without the use of a lock detector, and the disabling of the acquisition aid is not necessary. The PLL aided by SMC/2-SMC is studied analytically and via simulations. A significant improvement of the PLL's performance is demonstrated; specifically, the lock time is decreased, and the steady state phase error is reduced for a frequency ramp input.