Zero Cross Detection Using Phase Locked Loop

This paper discusses zero cross detection method for the time synchronization purpose that is based on phase locked loop. After familiarizing with PLL concept and its blocks, example design of the PLL is realized. Simulation schema is introduced to examine and analyse PLL behaviour under different grid interferences. Performed tests show two potential issues multiple zero crossing in the zero cross area may cause instability of the loop and the presence of harmonics may cause shifts of the zero cross event.