| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 5010323 | Solid-State Electronics | 2017 | 6 Pages |
Abstract
This paper systematically studies GeSn n-FETs, from individual process modules to a complete device. High-k gate stacks and NiGeSn metallic contacts for source and drain are characterized in independent experiments. To study both direct and indirect bandgap semiconductors, a range of 0-14.5Â at.% Sn-content GeSn alloys are investigated. Special emphasis is placed on capacitance-voltage (C-V) characteristics and Schottky-barrier optimization. GeSn n-FET devices are presented including temperature dependent I-V characteristics. Finally, as an important step towards implementing GeSn in tunnel-FETs, negative differential resistance in Ge0.87Sn0.13 tunnel-diodes is demonstrated at cryogenic temperatures. The present work provides a base for further optimization of GeSn FETs and novel tunnel FET devices.
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Authors
C. Schulte-Braucks, S. Glass, E. Hofmann, D. Stange, N. von den Driesch, J.M. Hartmann, Z. Ikonic, Q.T. Zhao, D. Buca, S. Mantl,