Article ID Journal Published Year Pages File Type
5363138 Applied Surface Science 2013 5 Pages PDF
Abstract
► A low reflectance of 4.72% was obtained by etching the pyramid-structured silicon wafers in a RIE system. ► The whole etching process was at room temperature and without any negative voltage pulses. ► Samples etched with FO2 lower than 6 sccm can't get low reflective silicon structure. ► Too big etching power of 225 W would make the nanostructures too sparse to obtain a low reflectance.
Related Topics
Physical Sciences and Engineering Chemistry Physical and Theoretical Chemistry
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