Article ID Journal Published Year Pages File Type
544519 Microelectronics Reliability 2016 4 Pages PDF
Abstract

•Research about impact of thin TiN capping layer on CHC reliability in sub-1nm HKMG devices.•A more accurate method based on division to predict the CHC lifetime of HKMG devices with thin TiN capping layer.•Finding a unique CHC degradation characteristic of interface trap in thin TiN capping layer devices.

Channel hot carrier (CHC) degradation in sub-1 nm equivalent oxide thickness (EOT) HK/MG nMOSFET has been studied in this paper. It is found that the degradation can be divided into two regimes based on stress induced drain-induced-barrier-lowering (DIBL) variation, namely higher stress drain voltage regime and lower stress drain voltage regime. Cause of the division is attributed to different activities of hot carriers. Lifetime prediction excluding higher voltage regime shows to be a more accurate method. In addition, there exists a deviation of degradation trend between 1.4 nm TiN and 2.4 nm TiN thickness nMOSFET in lower voltage regime. The deviation is attributed to different interface trap generation induced by TiN capping layer in different thickness, which is proved by the charge pumping experiment.

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Physical Sciences and Engineering Computer Science Hardware and Architecture
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