Research and development of a high-performance differential-hybrid charge sensitive preamplifier

A differential-hybrid charge sensitive preamplifier (CSP) was designed by taking a monolithic dual N-Channel Junction Field-effect Transistor (JFET) and a high-speed, low-noise, operational amplifier as the core parts. Input-stage of the circuit employs low-noise differential dual JFET, which ensures high input impedance and low noise. The differential dual transistor makes the quiescent point of the first-stage differential output stable, which is convenient for connecting with the post stage high-speed operational amplifier. Broadband could be amplified by connecting to the double differential dual transistors through the folded cascode-bootstrap. The amplifying circuit which replaces the interstage and post stage discrete components of a traditional CSP with integrated operational amplifier is simpler and more reliable. It simplifies the design of the quiescent point, gives full play to advantages of releasing large open-loop gain, and improves charge-voltage conversion gain stability. Particularly, the charge-voltage conversion gain is larger under a smaller feedback capacitor, thus enabling to gain better signal-noise ratio. The designed CSP was tested, reporting 3.3×1013 V/C charge sensitivity, about 90 ns rise time of signals, 35:1 signal-noise ratio to gamma-rays of 137Cs (662 keV) and a 0.023 fC/pF noise slope. Gamma-rays of 241Am (59.5 keV) were measured by the BPX66 detector and the designed CSP under room temperature, providing 1.97% energy resolution.