Optimum design of group delay equalizers

This paper introduces a novel optimization procedure for the design of group delay equalizers, which is simple to implement, robust and of fast convergence. A pole-zero placement technique is applied to ensure filter stability and direct updating equations. By cascading second-order allpass filter sections to the IIR filter to be equalized, the technique is able to produce group delay responses that are practically as close to a flat response as desired. The new optimization scheme is shown to avoid local minima often encountered by other algorithms used in the design of delay equalizers. Simulation results are presented to verify the effectiveness of the proposed approach.