Low-noise zero-input, overflow, and constant-input limit cycle-free implementation of state space digital filters

This paper focuses on the selection of a suitable building block to implement cascade or parallel designs of narrowband high-order state-space digital filters that are guaranteed against any limit cycle. Two building blocks for which the absence of any limit cycle is guaranteed are gathered from the literature, and their relative output-roundoff-noise variances and computational complexities are checked. The result is the choice of a limit cycle-free building block fitting very well the requirements of low roundoff noise and low computational complexity. Although yet available in the literature, to the extent of the authors' knowledge the use such a building block has not been explored. Then, it is now revisited, and the result is the proposition of a new synthesis strategy that accomplishes minimum relative roundoff noise variance in its output, which is the main contribution of the paper.