Hardware implementation of secure and lightweight Simeck32/64 cipher for IEEE 802.15.4 transceiver

With the advent of Internet of Things (IoT), a future scenario of billions of devices communicating with each other is inevitable. Being a low power technology, IEEE 802.15.4 standard garners a lot of attention in IoT applications. However, along with all the advantages, it also brings worrisome and threatening security issues to fore. Design of secure communication system with low power consumption is still a challenging task. In this work, a lightweight block cipher for IEEE 802.15.4 transceiver using Simeck32/64 cipher is introduced. Unlike other transceiver designs, encryption is performed before modulation and data bits are processed in parallel. These modifications allowed the system to operate at a lower frequency and thereby reduce the dynamic power required for encryption by 82.758%. The design is implemented in FPGA and an ASIC prototype is developed to ascertain its area and power requirements. With Simeck32/64, encryption takes 100  μW dynamic power while the transceiver requires 780 μW which is very much less than other transceivers. The proposed transceiver is resistant to differential attacks, statistical attacks, traffic analysis attacks and energy depletion attacks. As the security is provided in physical layer, it lessens computational burden of the higher layers and improves the lifetime of the system.