Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
6885796 | Microprocessors and Microsystems | 2018 | 15 Pages |
Abstract
Energy efficiency has become one the most important factors in today's processing platforms. Coarse-grained reconfigurable architectures (CGRAs) have turned out to perform well in this area. In this paper, we have proposed two methods to enhance their energy efficiency. The first method decreases the power consumption of a CGRA by reducing the number of occurring transitions of the context switching process. The second one decreases the energy consumption of a CGRA through volume shrinkage of its context memory. Our results show up to 83% of the context memory energy can be reduced by using our proposed method. In addition, a high level instruction-set simulator for CGRA has been presented in this paper.
Keywords
Related Topics
Physical Sciences and Engineering
Computer Science
Computer Networks and Communications
Authors
Mohammad Hossein Sargolzaei, Siamak Mohammadi,