Lightweight chaotic image encryption algorithm for real-time embedded system: Implementation and analysis on 32-bit microcontroller

The scintillating technological advancements have redefined the process of communication around the world. Banking, purchases, investments, emails, bill payments, etc. are being managed through online communications and needless to mention the linkage of these internet serves with embedded gadgets. A microcontroller being the low-cost solutions for real-time embedded applications has to handle rigid security algorithms for information security paradigm. The high level of sensitivity in chaos-based systems is highly suitable for the design of encryption schemes due to the randomness offered by them. The minimal memory resource and speed are the factors restricting the use of microcontrollers for implementing chaotic schemes that encrypt image data. This paper presents the design of a chaos-based image encryption algorithm with lightweight properties and its optimised implementation on a 32-bit microcontroller. This work also includes parameters related to the analysis of the security level and performance of the microcontroller that was missed to concentrate by the authors on their similar schemes reported in the literature. The level of safety of the proposed algorithm has been analysed via key sensitivity analysis, encryption quality analysis, randomness analysis, differential analysis, statistical analysis, visual analysis and attack analysis. Additionally, the results of performance analysis regarding smaller memory footprint and better throughput of proposed algorithm guarantee its suitability for real-time embedded applications.