Article ID Journal Published Year Pages File Type
6935378 Sustainable Energy, Grids and Networks 2018 28 Pages PDF
Abstract
Withstanding capability of Doubly Fed Induction Generator (DFIG) against the high voltage and low voltage is recognized as High Voltage Ride Through (HVRT) and Low Voltage Ride Through (LVRT). Dynamic Voltage Restorer (DVR), one of series Distributed-Flexible AC Transmission Systems (D-FACTS) families, has undertaken the DFIG perpetuation as any event to be taken place in the power system. Multi-Level Inverter (MLI) is the beating-heart of DVR with unique responsibility of synthesizing a staircase sinusoidal voltage from the DC voltage sources that ascertains the potentiality and cost-effectiveness of DVR. In this paper a novel asymmetrical MLI topology based on cascaded sub-MLI connected to full-bridge converter is indwelled in DVR so that its voltage quality to be ameliorated. To further consolidate DVR in dealing with HVRT and LVRT issues, it has been equipped with PIλDμ controller based on Multi Objective Bees Algorithm (MOBA). The performance of suggested DVR-33 level AMLI-PIλDμ-MOBA has been thoroughly evaluated under different severe and slight voltage sags and swells so that both the LVRT and HVRT capability of DFIG to be cleared up. To more scrutinize the performance of suggested DVR, it has been withal dealt with under flicker and harmonic voltage occurrences. Succinctly, the relevant analytical study along with the simulation results has transparently corroborated the performance of suggested AMLI as compared to other AMLIs. DVR-33 level AMLI-PIλDμ-MOBA has eminently compensated different severe and slight voltage sags and swells as well as voltage flicker and voltage harmonic.
Related Topics
Physical Sciences and Engineering Computer Science Computer Science Applications
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