Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
7150403 | Solid-State Electronics | 2018 | 7 Pages |
Abstract
In this paper we present a silicon tunnel FET based on line-tunneling to achieve better subthreshold performance. The fabricated device shows an on-current of Ionâ¯=â¯2.55â¯Ãâ¯10â7â¯A/µm at Vdsâ¯=â¯Vonâ¯=â¯Vgsâ¯ââ¯Voffâ¯=â¯â0.5â¯V for an Ioffâ¯=â¯1â¯nA/µm and an average SS of 55â¯mV/dec over two orders of magnitude of Id. Furthermore, the analog figures of merit have been calculated and show that the transconductance efficiency gm/Id beats the MOSFET performance at low currents.
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Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
K. Narimani, S. Glass, P. Bernardy, N. von den Driesch, Q.T. Zhao, S. Mantl,