Article ID Journal Published Year Pages File Type
7151181 Solid-State Electronics 2012 6 Pages PDF
Abstract
► Dopant-free CMOS multi-gate silicon-nanowire FET logic SOI technology. ► Device type (i.e. PMOS or NMOS) simply selected via back-gate voltage. ► Superior temperature hardness with low leakage currents. ► Freely voltage-configurable CMOS logic via back-bias selection. ► Provides additional flexibility in integrated circuit design for reconfigurable logic.
Related Topics
Physical Sciences and Engineering Engineering Electrical and Electronic Engineering
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